USPTO Patents Application 09781982

United States Patent and Trademark Office

UNITED STATES DEPARTMENT OF COMMERCE
United States Patent and Trademark Office
Address: COMMISSIONER FOR PATENTS
P.O. Box 1450

Alexandria. Vbgmia 22313-1430
www.uspto.gov

APPLICATION NO.

FILING DATE

FIRST NAMED INVENTOR

ATTORNEY DOCKET NO.

CONFIRMATION NO.

09/781.982

02/14/2001

Akira Itoh

7590

12/12/2005

STEVENS, DAVIS, MILLER & MOSHER, L.L.P.
1615 L Street, N.W., Suite 850
Washington, DC 20036

L7016.01102

9554

EXAMINER

THOMPSON, JAMES A

ART UNIT

PAPER NUMBER

2624

DATE MAILED: 12/12/2005

Please find below and/or attached an Office communication concerning this application or proceeding.

PTO-90C (Rev. 10/03)

Office Action Sumrnsrv

Application No.

09/781,982

Applicant(s)
ITOH, AKIRA

Examiner

James A. Thompson

Art Unit
2624

The MAILING DATE of this communication appears on the cover sheet with the correspondence address -
Period for Reply

A SHORTENED STATUTORY PERIOD FOR REPLY IS SET TO EXPIRE 3 MONTH(S) OR THIRTY (30) DAYS,
WHICHEVER IS LONGER, FROM THE MAILING DATE OF THIS COMMUNICATION.

- Extensions of time may be available under the provisions of 37 CFR 1.136(a). In no event, hovt/ever, may a reply be timely filed
after SIX (6) MONTHS from the mailing date of this communication.

• If NO period for reply Is specified above, the maximum statutory period will apply and WiW expire SIX (6) MONTHS from the mailing date of this communication.

- Failure to reply within the set or extended period for reply will, by statute, cause the application to become ABANDONED (35 U.S.O. § 133).
Any reply received by the Office later than three months after the mailing date of this communication, even if timely filed, may reduce any
earned patent term adjustment. See 37 CFR 1.704(b).

Status

1)13 Responsive to comnnunication(s) filed on 27 September 2005 and 26 Auoust 2005 ,
2a)n This action is FINAL 2b)l3 This action is non-final.

3) n Since this application is In condition for allowance except for fomial matters, prosecution as to the merits is

closed in accordance with the practice under Ex parte Quayle, 1 935 CD. 1 1 , 453 O.G. 21 3.

Disposition of Claims

4) S Claim(s) 1^:5 is/are pending in the application.

4a) Of the above claim(s) is/are withdrawn from consideration.

5) n Claim(s) is/are allowed,

6) 13 Claim(s) 1^ is/are rejected.

7) 13 Claim(s) 1 is/are objected to.

8) 0 Claim(s) are subject to restriction and/or election requirement.

Application Papers

9) 0 The specification is objected to by the Examiner.

10) 13 The drawing(s) filed on 14 February 2001 is/are: a)l3 accepted or b)n objected to by the Examiner.

Applicant may not request that any objection to the drawing(s) be held in abeyance. See 37 CFR 1, 85(a).
Replacement drawing sheet(s) including the correction Is required If the drawing(s) is objected to. See 37 CFR 1.121(d).

1 1) n The oath or declaration is objected to by the Examiner. Note the attached Office Action or fonn PTO-1 52.

Priority under 35 U.S.C. § 119

12) K Acknowledgment is made of a claim for foreign priority under 35 U.S.C. § 119(a)-(d) or (f).
a)|3 All b)n Some * c)^ None of:

1 Certified copies of the priority documents have been received.

2. n Certified copies of the priority documents have been received in Application No. .

3. n Copies of the certified copies of the priority documents have been received in this National Stage

application from the International Bureau (PCT Rule 17.2(a)).
* See the attached detailed Office action for a list of the certified copies not received.

AttacJ>rKent(s)

Hj/^ Notice of References Cited (PTO-892)

2) □ Notice of Draftsperson's Patent Drawing Review (PTO-948)

3) □ Information Disclosure Statement(s) (PTO-1 449 or PTO/SB/08)

Paper No(s)/Mail Date .

4) n Interview Summary (PTO-413)

Paper No(s)/Mail Date. .

5) □ Notice of Informal Patent Application (PTO-1 52)

6) □ Other: .

U.S, Patent and Trademark Office

PTOL-326 (Rev. 7-05)

Office Action Summary

Part of Paper No./Mail Date 20051 1 25

Application/Control Number: 09/781,982 Page 2

Art Unit: 2 624

DETAILED ACTION

Continued Examination Under 37 CFR 1.114

1. A request for continued examination under 37 CFR 1.114,
including the fee set forth in 37 CFR 1.17(e), was filed in this
application after final rejection. Since this application is
eligible for continued examination under 37 CFR 1.114, and- the
fee set forth in 37 CFR 1.17(e) has been timely paid, the
finality of the previous Office action has been withdrawn
pursuant to 37 CFR 1.114. Applicant's submission filed on 27
September 2005 has been entered.

Response to Arguments

2. Applicant's arguments filed 26 August 2005 have been fully
considered but they are not persuasive. As similarly set forth
in the Advisory Action dated 19 September 2005 and mailed 27
September 2005, Examiner agrees with Applicant that the present
amendments to the claims overcome the prior art of record.
However, additional prior art has been discovered which renders
the claims obvious to one of ordinary skill in the art at the
time of the invention. The prior art rejections of the present
claims are given in detail below.

Claim Objections

3. Claim 1 is objected to because of the following
informalities: Claim 1, line 6 recites "said central processing
means". There is insufficient antecedent basis for this
limitation in claim 1. Appropriate correction is required.

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Claim Rejections - 35 USC §103

4. The following is a quotation of 35 U.S.C. 103(a) which
forms the basis for all obviousness rejections set forth in this
Office action:

(a) A patent may not be obtained though the invention is not
identically disclosed or described as set forth in section 102 of this
title, if the differences between the subject matter sought to be
patented and the prior art are such that the subject matter as a whole
would have been obvious at the time the invention was made to a person
having ordinary skill in the art to which said subject matter pertains.
Patentability shall not be negatived by the manner in which the
invention was made.

5. Claims 1 and 4 are rejected under 35 U.S.C. 103(a) as being
unpatentable over Zhou (US Patent 5,798,753) in view of
Tachiuchi (US 4,839,739) and Mi t a (US Patent 5,293,481).

Regarding claim 1: Zhou discloses an image processing
apparatus (figure 7 of Zhou) comprising a central processing
section (figure 7(24) of Zhou) that conducts operation control
of the whole image processing apparatus (column 3, lines 49-52
of Zhou); a setting section (figure 7(52) of Zhou) that stores
control information specified by said central processing section
(column 7, lines 4-8 and column 11, lines 20-22 of Zhou); an
image input connection section (figure 7(54) of Zhou) that
receives predetermined data from an external device (column 11,
lines 8-15 of Zhou) ; and a plurality of image processing
sections (figure 4 (406A, 406B, 405C, 406D) of Zhou) that convert
parallel image data inputted from said image input connection
section (column 6, line 67 to column 7, line 8 of Zhou) to
serial image data (column 7, lines 23-27 of Zhou), said
plurality of image processing sections being provided
respectively in association with a plurality of development
colors (column 7, lines 16-22 of Zhou) . The parallel processing
is performed to produce a resultant color image (column 7, lines

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23-27 of Zhou) , said color image being inherently serial image
data since said color image data is output to a single output
device (figure 7(58A) and column 11, lines 14-17 of Zhou).

Zhou further discloses image output connection means
(figure 7(56) of Zhou) for transferring the serial image data
(column 11, lines 2-4 of Zhou) to an external device (figure 7
(58A) and column 11, lines 14-17 of Zhou) .

Zhou does not disclose expressly a clock generation section
that generates a clock signal having a basic period equivalent
to that of a pixel or less; a plurality of variable frequency
generation sections that adjust a frequency of the clock signal
outputted from said clock generation section to a predetermined
level independently of each other, based on the control
information specified by said central processing section, said
plurality of variable frequency generation sections being
provided respectively in association with a plurality of
development colors; that said plurality of image processing
sections each convert parallel image data inputted from said
input connection section; and that each of said plurality of
image processing sections converts said parallel image data
based on a frequency of a clock signal outputted from associated
one of said variable frequency generation means.

Tachiuchi discloses a clock generation section (figure 10
(21) of Tachiuchi) that generates a clock signal (column 6,
lines 56-58 of Tachiuchi) having a basic period equivalent to
that of a pixel or less (column 4, lines 23-26 of Tachiuchi) .
The frequency of the input signal of the amplifier (column 4,
lines 17-23 of Tachiuchi) is used to generate the binary signal
pixel data (column 4, lines 23-26 of Tachiuchi) . Said frequency
is taken from the original frequency of the oscillator, which is

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then divided (column 6, lines 56-58 of Tachiuchi) . Since the
frequency of the input signal of the amplifier is used to
generate the binary signal pixel data, the frequency of the
oscillator must inherently have a frequency equivalent to that
of a pixel or more. Otherwise, said frequency will be too slow
to sample the pixel data. Since, as is well known in the art,

frequency (f) is the inverse of the period (T) (r = y), then the

basic period of said generated clock signal is equivalent to
that of a pixel or less.

Tachiuchi further discloses a plurality of variable
frequency generation sections (figure 2(10) and column 7, lines
27-32 of Tachiuchi) that adjust a frequency of the clock signal
outputted from said clock generation section (column 3, lines 65
to column 4, line 1 of Tachiuchi) to a predetermined level
(column 3, lines 62-65 of Tachiuchi) . Since the individual
circuit are used for each of a plurality of colors (column 7,
lines 27-32 of Tachiuchi), said frequencies of each color are
therefore adjusted independently of each other. Said
frequencies are adjusted based on the control information
specified by a central processing section (figure 2(11) and
column 3, lines 65-68 of Tachiuchi) . Said plurality of variable
frequency generation sections is provided respectively in
association with a plurality of development colors (column 7,
lines 27-32 of Tachiuchi) .

Tachiuchi further discloses converting each color of the
image data based on a frequency of a clock signal outputted from
the variable frequency generation section (column 4, lines 8-12
and lines 17-23 of Tachiuchi) .

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Zhou and Tachiuchi are combinable because they are from the
same field of endeavor, namely digital image data generation and
processing. At the time of the invention, it would have been
obvious to a person of ordinary skill in the art to generate a
clock signal with a basic period equivalent to that of a pixel
or less, as taught by Tachiuchi. The motivation for doing so
would have been that such a signal is necessary for inputting
and binarizing image data since the frequency of said signal can
affect how the image data is binarized (column 4, lines 23-26 of
Tachiuchi) . Further, at the time of the invention, it would
have been obvious to a person of ordinary skill in the art to
use each the plurality of variable frequency generation sections
taught by Tachiuchi respectively for each of the parallel
processed colors taught by Zhou. Since each color is processed
separately and in parallel according to the teachings of Zhou

(column 7, lines 12-22 of Zhou), a separate variable frequency
generation section would be required for each color, which would
further result in each color of the parallel image data being
processed based on the associated one of the plurality of
variable frequency generation sections. The motivation for
doing so would have been that each color has different
characteristics (figure 14 and column 1, lines 58-62 of
Tachiuchi) and can therefore be handled separately of each other

(column 7, lines 62-65 of Tachiuchi) . Therefore, it would have
been obvious to combine Tachiuchi with Zhou.

Zhou in view of Tachiuchi does not disclose expressly that
said plurality of image processing sections each convert
parallel image data inputted from said input connection section.

Application/Control Number: 09/781,982 Page 7

Art Unit: 2624

Mita discloses color conversion processing (column 14,
lines 50-52 of Mita) wherein a set of 16 pixels are processed in
parallel (column 14, lines 39-49 of Mita) .

Zhou in view of Tachiuchi is combinable with Mita because
they are from the same field of endeavor, namely digital image
data generation and processing. At the time of the invention,
it would have been obvious to a person of ordinary skill in the
art to process the individual colors in parallel, as taught by
Zhou, and additionally process the pixels in parallel, as taught
by Mita. Thus, each of said plurality of image processing
sections, which processes a color according to the teachings of
Zhou, also processes the pixel values for said color in parallel
according to the pixels, as taught by Mita. Therefore, the
combination of Zhou in view of Tachiuchi and Mita teaches a
plurality of image processing sections, each of which correspond
to a particular color, and each of which performs parallel
processing on the image data. The motivation for doing so would
have been to provide for an overall faster processing of the
image data (column 1, lines 11-22 of Mita) . Therefore, it would
have been obvious to combine Mita with Zhou in view of Tachiuchi
to obtain the invention as specified in claim 1.

Regarding claim 4: Zhou discloses a plurality of image
processors (figure 4 (406A, 406B, 406C, 406D) of Zhou) that convert
parallel image data (column 6, line 67 to column 7, line 8 of
Zhou) to serial image data (column 7, lines 23-27 of Zhou) , said
plurality of image processing means being provided respectively
in association with a plurality of development colors (column 7,
lines 16-22 of Zhou) . The parallel processing is performed to
produce a resultant color image (column 7, lines 23-27 of Zhou) ,
said color image being inherently serial image data since said

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color image data is output to a single output device (figure
7(58A) and column 11, lines 14-17 of Zhou).

Zhou does not disclose expressly a plurality of variable
frequency generators, each corresponding to a different one of a
plurality of development colors, that separately generate clock
signals of desired frequencies; that said plurality of image
processors each convert parallel image data to serial image
data; that said plurality of image processors each correspond to
a respective one of said variable frequency generators; that
said parallel image data is converted to variable resolution
serial image data based on the frequency of the associated clock
signal, wherein for each image processor, the frequency of the
associated clock signal determines the degree of resolution the
converted serial image data represents with respect to the
corresponding parallel image data.

Tachiuchi discloses a plurality of variable frequency
generators (figure 2(10) and column 7, lines 27-32 of
Tachiuchi) . Since each of the individual circuits are used for
each of a plurality of colors (column 7, lines 27-32 of
Tachiuchi), said frequencies of each color are therefore
adjusted independently of each other, and thus separately
generate clock signals of desired frequencies. Said frequencies
are adjusted based on the control information specified by a
central processing means (figure 2(11) and column 3, lines 65-68
of Tachiuchi) . Said plurality of variable frequency generation
means is provided respectively in association with a plurality
of development colors (column 7, lines 27-32 of Tachiuchi) .

Tachiuchi further discloses converting each color of the
image data based on a frequency of a clock signal outputted from

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the variable frequency generation means (column 4, lines 8-12
and lines 17-23 of Tachiuchi) .

Tachiuchi further discloses that the image data is
converted to variable resolution image data (column 4, lines 20-
28 of Tachiuchi) based on the frequency of the associated clock
signal (column 4, lines 8-12 and lines 17-23 of Tachiuchi) . The
frequency of the associated clock signal determines the degree
of resolution the converted image data represents with respect
to the corresponding original image data (figures 5A-5B; figures
6A-6B; and column 4, lines 23-27 of Tachiuchi) . Since fz
(figures 6A-6B of Tachiuchi) is twice the frequency of fi
(figures 5A-5B of Tachiuchi), the number of ^'1'' bits in the
binary signal is less for f2 (000011) than for fi, (001111) and
thus the resolution of the image signal is finer spatially.
Further, a higher spatial resolution is precisely what one of
ordinary skill in the art would expect to result from a higher
corresponding clock frequency since, as is well-known in signal
processing, a higher sampling frequency generates a higher data
rate. Thus, the variable resolution of the image data is
naturally based upon the frequency of the associated clock.

Zhou and Tachiuchi are combinable because they are from the
same field of endeavor, namely digital image data generation and
processing. At the time of the invention, it would have been
obvious to a person of ordinary skill in the art to use each the
plurality of variable frequency generation means taught by
Tachiuchi respectively for each of the parallel processed colors
taught by Zhou. Since each color is processed separately and in
parallel according to the teachings of Zhou (column 7, lines 12-
22 of Zhou) , a separate variable frequency generation means
would be required for each color, which would further result in

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Page 10

each color of the parallel image data being processed based on
the associated one of the plurality of variable frequency
generation means. Further, due to the variable resolution
resulting from each of the individual clock signals, said
parallel image data is therefore converted to variable
resolution serial image data based on the frequency of the
associated clock signal, wherein for each image processor, the
frequency of the associated clock signal determines the degree
of resolution the converted serial image data represents with
respect to the corresponding parallel image data. The
motivation for doing so would have been that each color has
different characteristics (figure 14 and column 7, lines 58-62
of Tachiuchi) and can therefore be handled separately of each
other (column 1 , lines 62-65 of Tachiuchi) . Therefore, it would
have been obvious to combine Tachiuchi with Zhou.

Zhou in view of Tachiuchi does not disclose expressly that
said plurality of image processors each convert parallel image
data to serial image data.

Mita discloses color conversion processing (column 14,
lines 50-52 of Mita) wherein a set of 16 pixels are processed in
parallel (column 14, lines 39-49 of Mita) .

Zhou in view of Tachiuchi is combinable with Mita because
they are from the same field of endeavor, namely digital image
data generation and processing. At the time of the invention,
it would have been obvious to a person of ordinary skill in the
art to process the individual colors in parallel, as taught by
Zhou, and additionally process the pixels in parallel, as taught
by Mita. Thus, each of said plurality of image processors,
which processes a color according to the teachings of Zhou, also
processes the pixel values for said color in parallel according

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Page 11

to the pixels, as taught by Mita. Therefore, the combination of
Zhou in view of Tachiuchi and Mita teaches a plurality of image
processors, each of which correspond to a particular color, and
each of which performs parallel processing on the image data.
The motivation for doing so would have been to provide for an
overall faster processing of the image data (column 1, lines 11-
22 of Mita) . Therefore, it would have been obvious to combine
Mita with Zhou in view of Tachiuchi to obtain the invention as
specified in claim 4.

6. Claims 2-3 and 5 are rejected under 35 U.S.C. 103(a) as
being unpatentable over Zhou (US Patent 5,798,753) in view of
Tachiuchi (US 4,839,739), Bianchi (US Patent 5,898,509), and
Mita (US Patent 5,293,481).

Regarding claim 2: Zhou discloses an image processing
apparatus (figure 7 of Zhou) comprising a central processing
section (figure 7(24) of Zhou) that conducts operation control
of the whole image processing apparatus (column 3, lines 49-52
of Zhou); a setting section (figure 7(52) of Zhou) that stores
control information specified by said central processing section
(column 7, lines 4-8 and column 11, lines 20-22 of Zhou); an
image input connection section (figure 7(54) of Zhou) that
receives predetermined data from an external device (column 11,
lines 8-15 of Zhou) ; a plurality of image processing sections
(figure 4 (406A, 406B, 406C, 406D) of Zhou) that convert parallel
image data inputted from said image input connection section
(column 5, line 67 to column 7, line 8 of Zhou) to serial image
data (column 7, lines 23-27 of Zhou), said plurality of image
processing sections being provided respectively in association
with all development colors (column 7, lines 16-22 of Zhou) •

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The parallel processing is performed to produce a resultant
color image (column 1, lines 23-27 of Zhou), said color image
being inherently serial image data since said color image data
is output to a single output device (figure 7(58A) and column
11, lines 14-17 of Zhou) ,

Zhou further discloses an image output connection section
(figure 7(56) of Zhou) that transfers the serial image data
(column 11, lines 2-4 of Zhou) to an external device (figure 7
(58A) and column 11, lines 14-17 of Zhou) .

Zhou does not disclose expressly clock generation section
that generates a clock signal having a basic period equivalent
to that of a pixel or less; a plurality of variable frequency
generation sections that adjust a frequency of the clock signal
outputted from said clock generation section to a predetermined
level independently of each other, based on the control
information specified by said central processing section, said
plurality of variable frequency generation sections being
provided respectively in association with development colors
other than one predetermined color; and that each of said
plurality of image processing sections converts said parallel
image data based on a frequency of the clock signal outputted
from said clock generation section and a frequency of a clock
signal outputted from associated one of said variable frequency
generation sections by taking the frequency of the clock
outputted from the clock generation section as a reference.

Tachiuchi discloses a clock generation section (figure 10
(21) of Tachiuchi) that generates a clock signal (column 6,
lines 56-58 of Tachiuchi) having a basic period equivalent to
that of a pixel or less (column 4, lines 23-26 of Tachiuchi) .
The frequency of the input signal of the amplifier (column 4,

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lines 17-23 of Tachiuchi) is used to generate the binary signal
pixel data (column 4, lines 23-26 of Tachiuchi) • Said frequency
is taken from the original frequency of the oscillator, which is
then divided (column 6, lines 56-58 of Tachiuchi) . Since the
frequency of the input signal of the amplifier is used to
generate the binary signal pixel data, the frequency of the
oscillator must inherently have a frequency equivalent to that
of a pixel or more- Otherwise, said frequency will be too slow
to sample the pixel data. Since, as is well known in the art,

frequency (f) is the inverse of the period (T) (7' = y), then the

basic period of said generated clock signal is equivalent to
that of a pixel or less.

Tachiuchi further discloses a plurality of variable
frequency generation sections (figure 2(10) and column 7, lines
27-32 of Tachiuchi) that adjust a frequency of the clock signal
outputted from said clock generation section (column 3, lines 65
to column 4, line 1 of Tachiuchi) to a predetermined level
(column 3, lines 62-65 of Tachiuchi) . Since the individual
circuit are used for each of a plurality of colors (column 7,
lines 27-32 of Tachiuchi), said frequencies of each color are
therefore adjusted independently of each other. Said
frequencies are adjusted based on the control information
specified by a central processing section (figure 2(11) and
column 3, lines 65-68 of Tachiuchi) . Said plurality of variable
frequency generation sections is provided respectively in
association with a plurality of development colors (column 7,
lines 27-32 of Tachiuchi) .

Tachiuchi further discloses converting each color of the
image data based on a frequency of a clock signal outputted from

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the variable frequency generation sections (column 4, lines 8-12
and lines 17-23 of Tachiuchi) .

Zhou and Tachiuchi are combinable because they are from the
same field of endeavor, namely digital image data generation and
processing • At the time of the invention, it would have been
obvious to a person of ordinary skill in the art to generate a
clock signal with a basic period equivalent to that of a pixel
or less, as taught by Tachiuchi. The motivation for doing so
would have been that such a signal is necessary for inputting
and binarizing image data since the frequency of said signal can
affect how the image data is binarized (column 4, lines 23-26 of
Tachiuchi) , Further, at the time of the invention, it would
have been obvious to a person of ordinary skill in the art to
use the variable frequency generation sections taught by
Tachiuchi respectively for each of the parallel processed colors
taught by Zhou. Since each color is processed separately and in
parallel according to the teachings of Zhou (column 7, lines 12-
22 of Zhou) , a separate variable frequency generation section
would be required for each color, which would further result in
each color of the parallel image data being processed based on
the associated one of the plurality of variable frequency
generation sections. The motivation for doing so would have
been that each color has different characteristics (figure 14
and column 7, lines 58-62 of Tachiuchi) and can therefore be
handled separately of each other (column 7, lines 62-65 of
Tachiuchi) . Therefore, it would have been obvious to combine
Tachiuchi with Zhou.

Zhou in view of Tachiuchi does not disclose expressly that
said plurality of variable frequency generation sections is
provided in association with development colors other than one

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predetermined color; that each of said plurality of image
processing sections converts parallel image data inputted from
said image input connection section; and that said parallel
image data is converted based on a frequency of the clock signal
outputted from said clock generation section and a frequency of
a clock signal outputted from associated one of said variable
frequency generation sections by taking the frequency of the
clock signal outputted from the clock generation section as a
reference .

Bianchi discloses that the weakest channel determines the
overall cycle time (column 6, lines 10-12 of Bianchi) . The
other channels are variably set using the cycle time of the
weakest channel as a reference (column 6, lines 14-17 of
Bianchi) . Therefore, the cycle time for the weakest channel is
set to a constant, reference value (column 6, lines 10-14 of
Bianchi) , and the other channels are independently set based on
said reference value (column 6, lines 14-17 of Bianchi) . The
cycle time (T) inversely relates to the frequency (f) since, as

is well-known in the art, r = y. Therefore, setting a reference

cycle time inherently set a reference frequency, and variably
setting other cycle times based on said reference cycle time
inherently sets frequencies based on said reference frequency.

Zhou in view of Tachiuchi is combinable with Bianchi
because they are from the same field of endeavor, namely digital
image data generation and processing. At the time of the
invention, it would have been obvious to a person of ordinary
skill in the art to set one channel as a reference channel for
the cycle time and set the cycle times of the other channels
based on said reference cycle time, as taught by Bianchi.

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Therefore, there would be no need for a variable frequency
generation section for one predetermined color, namely the color
that requires a longer cycle time than the other colors. The
frequency of the clock signal outputted from said clock
generation section would correspond to the frequency of the
reference channel (color) . Therefore, the frequencies of the
clock signals outputted from their associated variable frequency
generation sections would be determined by taking the frequency
of the clock signal outputted from the clock generation section
as a reference. The motivation for doing so would have been
that the maximum and minimum light intensities at the CCD may be
different for one color band than for another color band (coliamn
1, lines 51-53 of Bianchi) and therefore parameters, such as the
clock cycle time, must be adjusted to maximize the signal-to-
noise ratio (column 1, lines 56-58 of Bianchi) . Therefore, it
would have been obvious to combine Bianchi with Zhou in view of
Tachiuchi •

Zhou in view of Tachiuchi and Bianchi does not disclose
expressly that each of said plurality of image processing
sections converts parallel image data inputted from said image
input connection section.

Mita discloses color conversion processing (column 14,
lines 50-52 of Mita) wherein a set of 16 pixels are processed in
parallel (column 14, lines 39-49 of Mita) .

Zhou in view of Tachiuchi is combinable with Mita because
they are from the same field of endeavor, namely digital image
data generation and processing. At the time of the invention,
it would have been obvious to a person of ordinary skill in the
art to process the individual colors in parallel, as taught by
Zhou, and additionally process the pixels in parallel, as taught

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by Mita. Thus, each of said plurality of image processing
sections, which processes a color according to the teachings of
Zhou, also processes the pixel values for said color in parallel
according to the pixels, as taught by Mita. Therefore, the
combination of Zhou in view of Tachiuchi and Mita teaches a
plurality of image processing sections, each of which correspond
to a particular color, and each of which performs parallel
processing on the image data. The motivation for doing so would
have been to provide for an overall faster processing of the
image data (column 1, lines 11-22 of Mita) . Therefore, it would
have been obvious to combine Mita with Zhou in view of Tachiuchi
to obtain the invention as specified in claim 2.

Regarding claim 3: Zhou discloses that said central
processing section has control information to control at least
one of the processing operation of said plurality of image
processing sections and the frequency adjusting operation of •
said variable frequency generation sections (column 7, lines 4-8
and column 11, lines 20-22 of Zhou) . Said plurality of image
processing sections operate according to the scale factor stored
in the scale factor register (column 7, lines 4-8 of Zhou),
which is controlled by said central processing section since
said central processing section controls the color conversion
processing (column 11, lines 20-22 of Zhou) and the overall
operation of the device (column 3, lines 49-52 of Zhou) •

Zhou in view of Tachiuchi does not disclose expressly that
said plurality of image processing sections are adapted to
conduct image addition/removal processing operation.

Bianchi discloses conducting an image addition/removal
processing operation (column 3, lines 31-37 of Bianchi) . The
DUMP operation of the CCD takes the charges that have collected

Application/Control Number: 09/781,982
Art Unit: 2624

Page 18

due to the addition of image data (column 3, lines 35-37 of
Bianchi) , and transfers said charges to an analog shift register
(column 3, lines 31-33 of Bianchi), thus initializing the CCD
cells (column 3, lines 33-34 of Bianchi) .

Zhou in view of Tachiuchi is combinable with Bianchi
because they are from the same field of endeavor, namely digital
image data generation and processing. At the time of the
invention, it would have been obvious to a person of ordinary
skill in the art to include the DUMP operation taught by Bianchi
as part of the operation of said image processing apparatus.
The motivation for doing so would have been to clear the image
data memory so that more image data can be processed by said
image processing apparatus (column 3, lines 35-37 of Bianchi) •
Therefore, it would have been obvious to combine Bianchi with
Zhou in view of Tachiuchi to obtain the invention as specified
in claim 3.

Regarding claim 5: The arguments regarding claim 4 are
incorporated herein,

Bianchi discloses that the weakest channel determines the
overall cycle time (column 6, lines 10-12 of Bianchi) . The
other channels are variably set using the cycle time of the
weakest channel as a fixed-rate reference (column 5, lines 14-17
of Bianchi) . Therefore, the cycle time for the weakest channel
is set to a fixed, reference value (column 6, lines 10-14 of
Bianchi), and the other channels are independently set based on
said reference value (column 6, lines 14-17 of Bianchi) • The
cycle time (T) inversely relates to the frequency (f) since, as

is well-known in the art, ^^y- Therefore, setting a reference

cycle time inherently set a reference frequency, and variably

Application/Control Niimber: 09/781,982 Page 19

Art Unit: 2624

setting other cycle times based on said reference cycle time
inherently sets frequencies based on said reference frequency.

Zhou in view of Tachiuchi is combinable with Bianchi
because they are from the same field of endeavor, namely digital
image data generation and processing. At the time of the
invention, it would have been obvious to a person of ordinary
skill in the art to set one channel, which would correspond to
one of the plurality of development colors taught by Zhou, as a
fixed-rate reference channel for the cycle time and set the
cycle times of the other channels based on said reference cycle
time, as taught by Bianchi. Therefore, one of the frequency
generators would instead be a fixed-rate frequency generator,
which also corresponds to a different one of the plurality of
development colors, that separately generates a clock signal of
a desired frequency. Further, the image processor associated
with color channel controlled by said fixed-rate frequency
generator would therefore be another image processor, associated
with the same development color as the fixed-rate frequency
generator, that converts parallel image data to serial image
data based on the frequency of the fixed-rate frequency
generator's clock signal, wherein the frequency of the clock
signal of the fixed-rate generator determines the degree of
resolution the converted serial image data represents with
respect to the corresponding parallel image data. In short, by
converting one of the plurality of variable frequency generators
into the fixed-rate frequency generator taught by Bianchi which
the remaining variable frequency generators reference for their
frequency value, each and every limitation of claim 5 has been
rendered unpatentable due to be obvious over Zhou in view of
Tachiuchi and Bianchi. The motivation for combining Bianchi

Application/Control Number: 09/781, 982
Art Unit: 2624

Page 20

with Zhou in view of Tachiuchi would have been that the maximum
and minimum light intensities at the CCD may be different for
one color band than for another color band (column 1, lines 51-
53 of Bianchi) and therefore parameters, such as the clock cycle
time, must be adjusted to maximize the signal-to-noise ratio
(column 1, lines 56-58 of Bianchi) . Therefore, it would have
been obvious to combine Bianchi with Zhou in view of Tachiuchi
to obtain the invention as specified in claim 5.

Any inquiry concerning this communication or earlier
communications from the examiner should be directed to James A.
Thompson whose telephone number is 571-272-7441, The examiner
can normally be reached on 8 : 30AM-5 : 00PM,

If attempts to reach the examiner by telephone are
unsuccessful, the examiner's supervisor, David K. Moore can be
reached on 571-272-7437. The fax phone number for the
organization where this application or proceeding is assigned is
571-273-8300.

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Conclusion

James A. Thompson

Examiner

Art Unit 2 624

25 November 2005

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